microprocessor architecture divided in The BIU has to interact with memory and of the programs and to carry out the required processing. EU & BIU. Explanation of the purpose of EU and BIU in Bus Interface Unit (BIU): The BIU interface to outside word. It provides full 16 bit. Define the jobs performed by the BIU and EU in the The functions performed by the Bus interface unit are: The BIU is responsible for the external bus.

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This serves as a loop counter.

The central circuitry in the EU directs the internal operation. Auth with social network: Execution unit gives instructions to BIU stating from where to fetch the data and then decode and execute those instructions. It handles all transfers of data and addresses on the buses for the execution unit. Also note that the four segments need not be defined separately.

This division into 64K-byte blocks is an arbitrary but convenient choice. When the EU executes instructions, the BIU gets up to 6 bytes of the next instruction and stores them in the instruction queue and this process is called instruction prefetch. Even though the is considered a bit processor, it has a bit data bus width its memory is still thought of in bytes.

SS register can be changed directly using POP instruction. If it is set, then the ue can be run in a single step mode. The main function of this order is to produce 20 bit physical address. In the beginning the CS: It gets used in arithmetic, logic and data transfer instructions.


Microprocessor Functional Units

ei Extra segment ES is a bit register containing address of 64KB segment, usually with program data. These values are used by the processor to access memory locations.

ALU is 6 bit. Microprocessor – Functional Units Advertisements. Thank you for your feedback! Each of these blocks of memory is used differently by the processor. The CPU must perform two miroprocessor read cycles: Because the next several instructions are usually in the queue, the BIU can access memory at a somewhat “leisurely” pace. This means that slow-memory parts can be used without affecting overall system performance.

The BIU will thus have to wait for the EU to pull over one or two bytes from the queue before resuming the fetch cycle. This is destination index register performs the same function as SI.

By microproceesor, the processor assumes that all data referenced by the stack pointer SP and base pointer BP registers is located in the stack mkcroprocessor.

This is stack pointer register pointing to program stack. After waiting for the memory access, the EU can resume executing instruction codes from the queue and the BIU 806 resume filling the queue. The stack segment registers points to the current stack. The data registers are normally used for storing temporary results that will be acted on by subsequent instructions. We think you have liked this presentation.


It must recognize, decode, and execute program instructions fetched from the memory unit. They are set using certain instructions. The BIU has a dedicated order. If cleared then the microprocfssor registers will be auto-incremented Interrupt-enable Flag IF – setting this bit enables maskable interrupts Single-step Flag TF – if set then single-step interrupt will occur after the next instruction.

Microprocessor Complete: The Execution Unit, EU

When EU executes instructions and is ready for its next instruction, then it simply reads the instruction from this instruction queue resulting in increased execution speed. A stack is a section blu memory to store addresses and data while a microprrocessor is in progress. At four cycles per instruction fetch, the queue will be completely filled during the execution of this single instruction.

Data segment DS is a bit register containing address of 64KB segment with program data.

Define the jobs performed by the BIU and EU in the 8086.

As we begin writing programs the consequences of these definitions will become clearer. Assuming that the queue is initially empty, the EU immediately draws this instruction from the queue and begins execution. It also contain 1 pointer register IP. Ask New Question Sign In.